1. Field of the Invention
The present invention relates to memory devices and systems including memory management.
2. Description of Related Art
Storage media used for large scale storage can be more than three orders of magnitude slower than media used for main memory devices configured for high speed access. Such performance gap between main memory and storage has become a critical design issue for computing systems, as many applications require intensive input/output traffic between main memory and storage. Some types of non-volatile memory, such as phase change memory, can be used both for main memory and for storage because of its byte-addressability, non-volatility, capacity scalability, and high access performance. However, nonvolatile memory often has write endurance limitations. Write endurance limitations for nonvolatile memory such as phase change material based memory can be about 106-109 cycles, while read/write limitations for dynamic random access memories (DRAM) can be more than 1015 cycles. Without memory management with regard to cycle counts, some parts of the storage media may be overused and wear out prematurely or even cause system failure. This can be particularly likely when the non-volatile memory is used for both main memory and mass storage.
It is desirable to provide a memory management scheme to enable utilization of non-volatile memory, like phase change memory, for multiple purposes, such as for both main memory and mass storage, while keeping a low input/output traffic overhead.